1. Field of the Invention
The present invention relates to a data processor, and more specifically to a system for executing a division of signed data in a microprogram controlled microcomputer.
2. Description of Related Art
Hitherto, microprogram controlled microcomputers have an instruction execution unit composed of a temporary register group having a shift function and used for temporarily storing items of operand data such as a dividend, a divisor, etc., an arithmetic logic unit (ALU), a so called SS flag indicative of an exclusive-OR between respective signs of the dividend and the divisor stored in the temporary register group, a so called SD flag showing the sign of the divisor, and a microsequencer controlling an overall operation of the execution unit. Information hold in the SS flag and the SD flag is supplied to the microsequencer.
In the above mentioned conventional microcomputer, division of signed data has been executed in the following manner under a microprogram control. In a first step and a second step, the microsequencer controls to transfer a dividend data and a divisor data to the temporary register group, and to set the sign data to the SS flag and SD flag. In a third step and a fourth step, the microsequencer examines a most significant bit (MSB) of the dividend, and if the MSB of the dividend is "1" which indicates that the dividend is negative, a branch processing is started in the microprogram, so that the ALU generates a two's complement of the dividend. Furthermore, in a fifth step and a sixth step, the microsequencer examines a MSB bit of the divisor, and if the MSB of the divisor is "1" which indicates that the divisor is negative, a branch processing is also started in the microprogram, so that the ALU generates a two's complement of the divisor. As the result of the above processing, the dividend and the divisor in the form of an absolute value are obtained. In a seventh step, a division operation of the dividend by the divisor is executed in accordance with a so-called restoring method by utilizing the shift function of the temporary register group and the ALU. In an eight step and a ninth step, after execution of the division operation, a quotient is stored in the temporary register group, and the microsequencer corrects a sign of the quotient with reference to a content of the SS flag as follows:
(a) In the case of the SS flag="1"
A branch processing is started in the microprogram, so that a two's complement of the quotient is generated, and then, stored in the temporary register group.
(b) In the case of the SS flag="0"
No processing is executed for the quotient.
In a tenth step and an eleventh step, the microsequencer corrects a sign of the remainder stored in the temporary register group, with reference to a content of the SD flag as follows:
(a) In the case of the SD flag="1"
A branch processing is started in the microprogram, so that a two's complement of the remainder is generated, and then, stored in the temporary register group.
(b) In the case of the SD flag="0"
No processing is executed for the remainder.
As seen from the above description, in the signed data division operation of the conventional microprogram controlled microcomputer, when the absolute values of the dividend and the divisor are generated on the basis of the sign examination of the dividend and the divisor, and when the signs of the quotient and the remainder obtained after the division operation are corrected, a condition discrimination and a conditional branch are executed in accordance with the microprogram. However, the condition discrimination and the conditional branch require a number of instruction execution clocks and a number of microprogram steps. As a result, the microcomputer have had an inevitably decreased operation speed, and an increased amount of microprogram has been required for the microcomputer.